PMC.P4(3) BSD Library Functions Manual PMC.P4(3)NAME
pmc.p4 — measurement events for Intel Pentium 4 and other Netburst archi‐
tecture CPUs
LIBRARY
Performance Counters Library (libpmc, -lpmc)
SYNOPSIS
#include <pmc.h>
DESCRIPTION
Intel P4 PMCs are present in Intel Pentium 4 and Xeon processors that use
the Netburst CPU architecture.
These PMCs are documented in "Volume 3: System Programming Guide", IA-32
Intel(R) Architecture Software Developer's Manual, Order Number
245472-012, Intel Corporation, 2003. Further information about using
these PMCs may be found in IA-32 Intel(R) Architecture Optimization
Guide, Order Number 248966-009, Intel Corporation, 2003. Some of these
events are affected by processor errata described in Intel(R)Pentium(R)
4 Processor Specification Update, Document Number: 249199-059, Intel
Corporation, April 2005.
PMC Features
Intel Pentium 4 PMCs are 40 bits wide. Each CPU contains 18 PMCs,
divided into 4 groups with 4, 4, 4 and 6 PMCs respectively. On proces‐
sors with hyperthreading support, PMC resources are shared between logi‐
cal processors. These PMCs support the following capabilities:
Capability Support
PMC_CAP_CASCADE Yes
PMC_CAP_EDGE Yes
PMC_CAP_INTERRUPT Yes
PMC_CAP_INVERT Yes
PMC_CAP_READ Yes
PMC_CAP_PRECISE Unimplemented
PMC_CAP_SYSTEM Yes
PMC_CAP_TAGGING Yes
PMC_CAP_THRESHOLD Yes
PMC_CAP_USER Yes
PMC_CAP_WRITE Yes
Event Qualifiers
Event specifiers for Intel P4 PMCs can have the following common quali‐
fiers:
active=choice
(On P4 HTT CPUs) Filter event counting based on which logical
processors are active. The allowed values of choice are:
any Count when either logical processor is active.
both Count when both logical processors are active.
none Count only when neither logical processor is active.
single Count only when one logical processor is active.
The default is “both”.
cascade
Configure the PMC to cascade onto its partner. See Cascading P4
PMCs below for more information.
edge Configure the counter to count false to true transitions of the
threshold comparision output. This qualifier only takes effect
if a threshold qualifier has also been specified.
complement
Configure the counter to increment only when the event count seen
is less than the threshold qualifier value specified.
mask=qualifier
Many event specifiers for Intel P4 PMCs need to be additionally
qualified using a mask qualifier. The allowed syntax for these
qualifiers is event specific and is described along with the
events.
os Configure the PMC to count when the CPL of the processor is 0.
precise
Select precise event based sampling. Precise sampling is sup‐
ported by the hardware for a limited set of events.
tag=value
Configure the PMC to tag the internal uop selected by the other
fields in this event specifier with value value. This feature is
used when cascading PMCs.
threshold=value
Configure the PMC to increment only when the event counts seen
are greater than the specified threshold value value.
usr Configure the PMC to count when the CPL of the processor is 1, 2
or 3.
If neither of the “os” or “usr” qualifiers are specified, the default is
to enable both.
On Intel Pentium 4 processors with HTT, events are divided into two
classes:
TS Events
are those where hardware can differentiate between events gener‐
ated on one logical processor from those generated on the other.
TI Events
are those where hardware cannot differentiate between events gen‐
erated by multiple logical processors in a package.
Only TS events are allowed for use with process-mode PMCs on Pen‐
tium-4/HTT CPUs.
The event specifiers supported by Intel P4 PMCs are:
p4-128bit-mmx-uop [,mask=flags]
(TI event) Count integer SIMD SSE2 instructions that operate on
128 bit SIMD operands. Qualifier flags can take the following
value (which is also the default):
all Count all uops operating on 128 bit SIMD integer operands
in memory or XMM register.
If an instruction contains more than one 128 bit MMX uop, then
each uop will be counted.
p4-64bit-mmx-uop [,mask=flags]
(TI event) Count MMX instructions that operate on 64 bit SIMD op‐
erands. Qualifier flags can take the following value (which is
also the default):
all Count all uops operating on 64 bit SIMD integer operands
in memory or in MMX registers.
If an instruction contains more than one 64 bit MMX uop, then
each uop will be counted.
p4-b2b-cycles
(TI event) Count back-to-back bus cycles. Further documentation
for this event is unavailable.
p4-bnr (TI event) Count bus-not-ready conditions. Further documentation
for this event is unavailable.
p4-bpu-fetch-request [,mask=qualifier]
(TS event) Count instruction fetch requests qualified by addi‐
tional flags specified in qualifier. At this point only one flag
is supported:
tcmiss Count trace cache lookup misses.
The default qualifier is also “mask=tcmiss”.
p4-branch-retired [,mask=flags]
(TS event) Counts retired branches. Qualifier flags is a list of
the following ‘+’ separated strings:
mmnp Count branches not-taken and predicted.
mmnm Count branches not-taken and mis-predicted.
mmtp Count branches taken and predicted.
mmtm Count branches taken and mis-predicted.
The default qualifier counts all four kinds of branches.
p4-bsq-active-entries [,mask=qualifier]
(TS event) Count the number of entries (clipped at 15) currently
active in the BSQ. Qualifier qualifier is a ‘+’ separated set of
the following flags:
req-type0, req-type1
Forms a 2-bit number used to select the request type
encoding:
0 reads excluding read invalidate
1 read invalidates
2 writes other than writebacks
3 writebacks
Bit “req-type1” is the MSB for this two bit number.
req-len0, req-len1
Forms a two-bit number that specifies the request length
encoding:
0 0 chunks
1 1 chunk
3 8 chunks
Bit “req-len1” is the MSB for this two bit number.
req-io-type
Count requests that are input or output requests.
req-lock-type
Count requests that lock the bus.
req-lock-cache
Count requests that lock the cache.
req-split-type
Count requests that is a bus 8-byte chunk that is split
across an 8-byte boundary.
req-dem-type
Count requests that are demand (not prefetches) if set.
Count requests that are prefetches if not set.
req-ord-type
Count requests that are ordered.
mem-type0, mem-type1, mem-type2
Forms a 3-bit number that specifies a memory type encod‐
ing:
0 UC
1 USWC
4 WT
5 WP
6 WB
Bit “mem-type2” is the MSB of this 3-bit number.
The default qualifier has all the above bits set.
Edge triggering using the “edge” qualifier should not be used
with this event when counting cycles.
p4-bsq-allocation [,mask=qualifier]
(TS event) Count allocations in the bus sequence unit according
to the flags specified in qualifier, which is a ‘+’ separated set
of the following flags:
req-type0, req-type1
Forms a 2-bit number used to select the request type
encoding:
0 reads excluding read invalidate
1 read invalidates
2 writes other than writebacks
3 writebacks
Bit “req-type1” is the MSB for this two bit number.
req-len0, req-len1
Forms a two-bit number that specifies the request length
encoding:
0 0 chunks
1 1 chunk
3 8 chunks
Bit “req-len1” is the MSB for this two bit number.
req-io-type
Count requests that are input or output requests.
req-lock-type
Count requests that lock the bus.
req-lock-cache
Count requests that lock the cache.
req-split-type
Count requests that is a bus 8-byte chunk that is split
across an 8-byte boundary.
req-dem-type
Count requests that are demand (not prefetches) if set.
Count requests that are prefetches if not set.
req-ord-type
Count requests that are ordered.
mem-type0, mem-type1, mem-type2
Forms a 3-bit number that specifies a memory type encod‐
ing:
0 UC
1 USWC
4 WT
5 WP
6 WB
Bit “mem-type2” is the MSB of this 3-bit number.
The default qualifier has all the above bits set.
This event is usually used along with the “edge” qualifier to
avoid multiple counting.
p4-bsq-cache-reference [,mask=qualifier]
(TS event) Count cache references as seen by the bus unit (2nd or
3rd level cache references). Qualifier qualifier is a ‘+’ sepa‐
rated list of the following keywords:
rd-2ndl-hits
Count 2nd level cache hits in the shared state.
rd-2ndl-hite
Count 2nd level cache hits in the exclusive state.
rd-2ndl-hitm
Count 2nd level cache hits in the modified state.
rd-3rdl-hits
Count 3rd level cache hits in the shared state.
rd-3rdl-hite
Count 3rd level cache hits in the exclusive state.
rd-3rdl-hitm
Count 3rd level cache hits in the modified state.
rd-2ndl-miss
Count 2nd level cache misses.
rd-3rdl-miss
Count 3rd level cache misses.
wr-2ndl-miss
Count write-back lookups from the data access cache that
miss the 2nd level cache.
The default is to count all the above events.
p4-execution-event [,mask=flags]
(TS event) Count the retirement of tagged uops selected through
the execution tagging mechanism. Qualifier flags can contain the
following strings separated by ‘+’ characters:
nbogus0, nbogus1, nbogus2, nbogus3
The marked uops are not bogus.
bogus0, bogus1, bogus2, bogus3
The marked uops are bogus.
This event requires additional (upstream) events to be allocated
to perform the desired uop tagging. The default is to set all
the above flags. This event can be used for precise event based
sampling.
p4-front-end-event [,mask=flags]
(TS event) Count the retirement of tagged uops selected through
the front-end tagging mechanism. Qualifier flags can contain the
following strings separated by ‘+’ characters:
nbogus The marked uops are not bogus.
bogus The marked uops are bogus.
This event requires additional (upstream) events to be allocated
to perform the desired uop tagging. The default is to select
both kinds of events. This event can be used for precise event
based sampling.
p4-fsb-data-activity [,mask=flags]
(TI event) Count each DBSY or DRDY event selected by qualifier
flags. Qualifier flags is a ‘+’ separated set of the following
flags:
drdy-drv
Count when this processor is driving data onto the bus.
drdy-own
Count when this processor is reading data from the bus.
drdy-other
Count when data is on the bus but not being sampled by
this processor.
dbsy-drv
Count when this processor reserves the bus for use in the
next cycle in order to drive data.
dbsy-own
Count when some agent reserves the bus for use in the
next bus cycle to drive data that this processor will
sample.
dbsy-other
Count when some agent reserves the bus for use in the
next bus cycle to drive data that this processor will not
sample.
Flags “drdy-own” and “drdy-other” are mutually exclusive. Flags
“dbsy-own” and “dbsy-other” are mutually exclusive. The default
value for qualifier is “drdy-drv+drdy-own+dbsy-drv+dbsy-own”.
p4-global-power-events [,mask=flags]
(TS event) Count cycles during which the processor is not
stopped. Qualifier flags can take the following value (which is
also the default):
running
Count cycles when the processor is active.
p4-instr-retired [,mask=flags]
(TS event) Count instructions retired during a clock cycle.
Qualifer flags comprises of the following strings separated by
‘+’ characters:
nbogusntag
Count non-bogus instructions that are not tagged.
nbogustag
Count non-bogus instructions that are tagged.
bogusntag
Count bogus instructions that are not tagged.
bogustag
Count bogus instructions that are tagged.
The default qualifier counts all the above kinds of instructions.
p4-ioq-active-entries [,mask=qualifier] [,busreqtype=req-type]
(TS event) Count the number of entries (clipped at 15) in the IOQ
that are active. The event masks are specified by qualifier
qualifier and req-type.
Qualifier qualifier is a ‘+’ separated set of the following
flags:
all-read
Count read entries.
all-write
Count write entries.
mem-uc Count entries accessing uncacheable memory.
mem-wc Count entries accessing write-combining memory.
mem-wt Count entries accessing write-through memory.
mem-wp Count entries accessing write-protected memory
mem-wb Count entries accessing write-back memory.
own Count store requests driven by the processor (i.e., not
by other processors or by DMA).
other Count store requests driven by other processors or by
DMA.
prefetch
Include hardware and software prefetch requests in the
count.
The default value for qualifier is to enable all the above flags.
The req-type qualifier is a 5-bit number can be additionally used
to select a specific bus request type. The default is 0.
The “edge” qualifier should not be used when counting cycles with
this event. The exact behaviour of this event depends on the
processor revision.
p4-ioq-allocation [,mask=qualifier] [,busreqtype=req-type]
(TS event) Count various types of transactions on the bus match‐
ing the flags set in qualifier and req-type.
Qualifier qualifier is a ‘+’ separated set of the following
flags:
all-read
Count read entries.
all-write
Count write entries.
mem-uc Count entries accessing uncacheable memory.
mem-wc Count entries accessing write-combining memory.
mem-wt Count entries accessing write-through memory.
mem-wp Count entries accessing write-protected memory
mem-wb Count entries accessing write-back memory.
own Count store requests driven by the processor (i.e., not
by other processors or by DMA).
other Count store requests driven by other processors or by
DMA.
prefetch
Include hardware and software prefetch requests in the
count.
The default value for qualifier is to enable all the above flags.
The req-type qualifier is a 5-bit number can be additionally used
to select a specific bus request type. The default is 0.
The “edge” qualifier is normally used with this event to prevent
multiple counting. The exact behaviour of this event depends on
the processor revision.
p4-itlb-reference [mask=qualifier]
(TS event) Count translations using the intruction translation
look-aside buffer. The qualifier argument is a list of the fol‐
lowing strings separated by ‘+’ characters.
hit Count ITLB hits.
miss Count ITLB misses.
hit-uc Count uncacheable ITLB hits.
If no qualifier is specified the default is to count all the
three kinds of ITLB translations.
p4-load-port-replay [,mask=qualifier]
(TS event) Count replayed events at the load port. Qualifier
qualifier can take on one value:
split-ld
Count split loads.
The default value for qualifier is “split-ld”.
p4-mispred-branch-retired [,mask=flags]
(TS event) Count mispredicted IA-32 branch instructions. Quali‐
fier flags can take the following value (which is also the
default):
nbogus Count non-bogus retired branch instructions.
p4-machine-clear [,mask=flags]
(TS event) Count the number of pipeline clears seen by the pro‐
cessor. Qualifer flags is a list of the following strings sepa‐
rated by ‘+’ characters:
clear Count for a portion of the many cycles when the machine
is being cleared for any reason.
moclear
Count machine clears due to memory ordering issues.
smclear
Count machine clears due to self-modifying code.
Use qualifier “edge” to get a count of occurrences of machine
clears. The default qualifier is “clear”.
p4-memory-cancel [,mask=event-list]
(TS event) Count the cancelling of various kinds of requests in
the data cache address control unit of the CPU. The qualifier
event-list is a list of the following strings separated by ‘+’
characters:
st-rb-full
Requests cancelled because no store request buffer was
available.
64k-conf
Requests that conflict due to 64K aliasing.
If event-list is not specified, then the default is to count both
kinds of events.
p4-memory-complete [,mask=event-list]
(TS event) Count the completion of load split, store split,
uncacheable split and uncacheable load operations selected by
qualifier event-list. The qualifier event-list is a ‘+’ sepa‐
rated list of the following flags:
lsc Count load splits completed, excluding loads from
uncacheable or write-combining areas.
ssc Count any split stores completed.
The default is to count both kinds of operations.
p4-mob-load-replay [,mask=qualifier]
(TS event) Count load replays triggered by the memory order buf‐
fer. Qualifier qualifier can be a ‘+’ separated list of the fol‐
lowing flags:
no-sta Count replays because of unknown store addresses.
no-std Count replays because of unknown store data.
partial-data
Count replays because of partially overlapped data
accesses between load and store operations.
unalgn-addr
Count replays because of mismatches in the lower 4 bits
of load and store operations.
The default qualifier is no-sta+no-std+partial-data+unalgn-addr.
p4-packed-dp-uop [,mask=flags]
(TI event) Count packed double-precision uops. Qualifier flags
can take the following value (which is also the default):
all Count all uops operating on packed double-precision oper‐
ands.
p4-packed-sp-uop [,mask=flags]
(TI event) Count packed single-precision uops. Qualifier flags
can take the following value (which is also the default):
all Count all uops operating on packed single-precision oper‐
ands.
p4-page-walk-type [,mask=qualifier]
(TI event) Count page walks performed by the page miss handler.
Qualifier qualifier can be a ‘+’ separated list of the following
keywords:
dtmiss Count page walks for data TLB misses.
itmiss Count page walks for instruction TLB misses.
The default value for qualifier is “dtmiss+itmiss”.
p4-replay-event [,mask=flags]
(TS event) Count the retirement of tagged uops selected through
the replay tagging mechanism. Qualifier flags contains a ‘+’
separated set of the following strings:
nbogus The marked uops are not bogus.
bogus The marked uops are bogus.
This event requires additional (upstream) events to be allocated
to perform the desired uop tagging. The default qualifier counts
both kinds of uops. This event can be used for precise event
based sampling.
p4-resource-stall [,mask=flags]
(TS event) Count the occurrence or latency of stalls in the allo‐
cator. Qualifier flags can take the following value (which is
also the default):
sbfull A stall due to the lack of store buffers.
p4-response
(TI event) Count different types of responses. Further documen‐
tation on this event is not available.
p4-retired-branch-type [,mask=flags]
(TS event) Count branches retired. Qualifier flags contains a
‘+’ separated list of strings:
conditional
Count conditional jumps.
call Count direct and indirect call branches.
return Count return branches.
indirect
Count returns, indirect calls or indirect jumps.
The default qualifier counts all the above branch types.
p4-retired-mispred-branch-type [,mask=flags]
(TS event) Count mispredicted branches retired. Qualifier flags
contains a ‘+’ separated list of strings:
conditional
Count conditional jumps.
call Count indirect call branches.
return Count return branches.
indirect
Count returns, indirect calls or indirect jumps.
The default qualifier counts all the above branch types.
p4-scalar-dp-uop [,mask=flags]
(TI event) Count the number of scalar double-precision uops.
Qualifier flags can take the following value (which is also the
default):
all Count the number of scalar double-precision uops.
p4-scalar-sp-uop [,mask=flags]
(TI event) Count the number of scalar single-precision uops.
Qualifier flags can take the following value (which is also the
default):
all Count all uops operating on scalar single-precision oper‐
ands.
p4-snoop
(TI event) Count snoop traffic. Further documentation on this
event is not available.
p4-sse-input-assist [,mask=flags]
(TI event) Count the number of times an assist is required to
handle problems with the operands for SSE and SSE2 operations.
Qualifier flags can take the following value (which is also the
default):
all Count assists for all SSE and SSE2 uops.
p4-store-port-replay [,mask=qualifier]
(TS event) Count events replayed at the store port. Qualifier
qualifier can take on one value:
split-st
Count split stores.
The default value for qualifier is “split-st”.
p4-tc-deliver-mode [,mask=qualifier]
(TI event) Count the duration in cycles of operating modes of the
trace cache and decode engine. The desired operating mode is
selected by qualifier, which is a list of the following strings
separated by ‘+’ characters:
DD Both logical processors are in deliver mode.
DB Logical processor 0 is in deliver mode while logical pro‐
cessor 1 is in build mode.
DI Logical processor 0 is in deliver mode while logical pro‐
cessor 1 is halted, or in machine clear, or transitioning
to a long microcode flow.
BD Logical processor 0 is in build mode while logical pro‐
cessor 1 is in deliver mode.
BB Both logical processors are in build mode.
BI Logical processor 0 is in build mode while logical pro‐
cessor 1 is halted, or in machine clear or transitioning
to a long microcode flow.
ID Logical processor 0 is halted, or in machine clear or
transitioning to a long microcode flow while logical pro‐
cessor 1 is in deliver mode.
IB Logical processor 0 is halted, or in machine clear or
transitioning to a long microcode flow while logical pro‐
cessor 1 is in build mode.
If there is only one logical processor in the processor package
then the qualifier for logical processor 1 is ignored. If no
qualifier is specified, the default qualifier is
“DD+DB+DI+BD+BB+BI+ID+IB”.
p4-tc-ms-xfer [,mask=flags]
(TI event) Count the number of times uop delivery changed from
the trace cache to MS ROM. Qualifier flags can take the follow‐
ing value (which is also the default):
cisc Count TC to MS transfers.
p4-uop-queue-writes [,mask=flags]
(TS event) Count the number of valid uops written to the uop
queue. Qualifier flags is a list of the following strings, sepa‐
rated by ‘+’ characters:
from-tc-build
Count uops being written from the trace cache in build
mode.
from-tc-deliver
Count uops being written from the trace cache in deliver
mode.
from-rom
Count uops being written from microcode ROM.
The default qualifier counts all the above kinds of uops.
p4-uop-type [,mask=flags]
(TS event) This event is used in conjunction with the front-end
at-retirement mechanism to tag load and store uops. Qualifer
flags comprises the following strings separated by ‘+’ charac‐
ters:
tagloads
Mark uops that are load operations.
tagstores
Mark uops that are store operations.
The default qualifier counts both kinds of uops.
p4-uops-retired [,mask=flags]
(TS event) Count uops retired during a clock cycle. Qualifier
flags comprises the following strings separated by ‘+’ charac‐
ters:
nbogus Count marked uops that are not bogus.
bogus Count marked uops that are bogus.
The default qualifier counts both kinds of uops.
p4-wc-buffer [,mask=flags]
(TI event) Count write-combining buffer operations. Qualifier
flags contains the following strings separated by ‘+’ characters:
wcb-evicts
WC buffer evictions due to any cause.
wcb-full-evict
WC buffer evictions due to no WC buffer being available.
The default qualifer counts both kinds of evictions.
p4-x87-assist [,mask=flags]
(TS event) Count the retirement of x87 instructions that required
special handling. Qualifier flags contains the following strings
separated by ‘+’ characters:
fpsu Count instructions that saw an FP stack underflow.
fpso Count instructions that saw an FP stack overflow.
poao Count instructions that saw an x87 output overflow.
poau Count instructions that saw an x87 output underflow.
prea Count instructions that needed an x87 input assist.
The default qualifier counts all the above types of instruction
retirements.
p4-x87-fp-uop [,mask=flags]
(TI event) Count x87 floating-point uops. Qualifier flags can
take the following value (which is also the default):
all Count all x87 floating-point uops.
If an instruction contains more than one x87 floating-point uops,
then all x87 floating-point uops will be counted. This event
does not count x87 floating-point data movement operations.
p4-x87-simd-moves-uop [,mask=flags]
(TI event) Count each x87 FPU, MMX, SSE, or SSE2 uops that load
data or store data or perform register-to-register moves. This
event does not count integer move uops. Qualifier flags may con‐
tain the following keywords separated by ‘+’ characters:
allp0 Count all x87 and SIMD store and move uops.
allp2 Count all x87 and SIMD load uops.
The default is to count all uops. (Errata) This event may be
affected by processor errata N43.
Cascading P4 PMCs
PMC cascading support is currently poorly implemented. While individual
event counters may be allocated with a “cascade” qualifier, the current
API does not offer the ability to name and allocate all the resources
needed for a cascaded event counter pair in a single operation.
Precise Event Based Sampling
Support for precise event based sampling is currently unimplemented.
Event Name Aliases
The following table shows the mapping between the PMC-independent aliases
supported by Performance Counters Library (libpmc, -lpmc) and the under‐
lying hardware events used.
Alias Event
branches p4-branch-retired,mask=mmtp+mmtm
branch-mispredicts p4-mispred-branch-retired
dc-misses (unsupported)
ic-misses (unsupported)
instructions p4-instr-retired,mask=nbogusntag+nbogustag
interrupts (unsupported)
unhalted-cycles p4-global-power-events
SEE ALSOpmc(3), pmc.atom(3), pmc.core(3), pmc.core2(3), pmc.iaf(3), pmc.k7(3),
pmc.k8(3), pmc.p5(3), pmc.p6(3), pmc.tsc(3), pmclog(3), hwpmc(4)HISTORY
The pmc library first appeared in FreeBSD 6.0.
AUTHORS
The Performance Counters Library (libpmc, -lpmc) library was written by
Joseph Koshy ⟨jkoshy@FreeBSD.org⟩.
BSD October 4, 2008 BSD
