AHC(4) BSD Kernel Interfaces Manual AHC(4)NAMEahc — Adaptec VL/EISA/PCI/CardBus SCSI host adapter driver
SYNOPSIS
For VL cards:
ahc0 at isa? port ? irq ?
For EISA cards:
ahc* at eisa? slot ?
For PCI cards:
ahc* at pci? dev ? function ?
For CardBus cards:
ahc* at cardbus? function ?
To allow PCI adapters to use memory mapped I/O if enabled:
options AHC_ALLOW_MEMIO
Disable tagged queuing (avoids hangs on some hardware under load)
options AHC_NO_TAGS
Change the default SCSI id for cards without a SEEPROM (default 7):
options AHC_CARDBUS_DEFAULT_SCSI_ID=integer
For SCSI buses:
scsibus* at ahc?
DESCRIPTION
The ahc device driver supports SCSI controllers based on Adaptec AIC77xx
and AIC78xx SCSI host adapter chips found on many motherboards as well as
Adaptec SCSI controller cards.
Driver features include support for twin and wide buses, fast, ultra or
ultra2 synchronous transfers depending on controller type, tagged queuing
and SCB paging.
Memory mapped I/O can be enabled for PCI devices with the
“AHC_ALLOW_MEMIO” configuration option. Memory mapped I/O is more effi‐
cient than the alternative, programmed I/O. Most PCI BIOSes will map
devices so that either technique for communicating with the card is
available. In some cases, usually when the PCI device is sitting behind
a PCI->PCI bridge, the BIOS may fail to properly initialize the chip for
memory mapped I/O. The typical symptom of this problem is a system hang
if memory mapped I/O is attempted. Most modern motherboards perform the
initialization correctly and work fine with this option enabled.
Per target configuration performed in the SCSI-Select menu, accessible at
boot in non-EISA models, or through an EISA configuration utility for
EISA models, is honored by this driver. This includes synchronous/asyn‐
chronous transfers, maximum synchronous negotiation rate, wide transfers,
disconnection, the host adapter's SCSI ID, and, in the case of EISA Twin
Channel controllers, the primary channel selection. For systems that
store non-volatile settings in a system specific manner rather than a
serial EEPROM directly connected to the aic7xxx controller, the BIOS must
be enabled for the driver to access this information. This restriction
applies to all EISA and many motherboard configurations.
Note that I/O addresses are determined automatically by the probe rou‐
tines, but care should be taken when using a 284x (VESA local bus
controller) in an EISA system. The jumpers setting the I/O area for the
284x should match the EISA slot into which the card is inserted to pre‐
vent conflicts with other EISA cards.
Performance and feature sets vary throughout the aic7xxx product line.
The following table provides a comparison of the different chips sup‐
ported by the ahc driver. Note that wide and twin channel features,
although always supported by a particular chip, may be disabled in a par‐
ticular motherboard or card design.
Chip MIPS Bus MaxSync MaxWidth SCBs Features
aic7770 10 EISA/VL 10MHz 16Bit 4 1
aic7850 10 PCI/32 10MHz 8Bit 3
aic7860 10 PCI/32 20MHz 8Bit 3
aic7870 10 PCI/32 10MHz 16Bit 16
aic7880 10 PCI/32 20MHz 16Bit 16
aic7890 20 PCI/32 40MHz 16Bit 16 3 4 5 6 7 8
aic7891 20 PCI/64 40MHz 16Bit 16 3 4 5 6 7 8
aic7892 20 PCI/64 80MHz 16Bit 16 3 4 5 6 7 8
aic7895 15 PCI/32 20MHz 16Bit 16 2 3 4 5
aic7895C 15 PCI/32 20MHz 16Bit 16 2 3 4 5 8
aic7896 20 PCI/32 40MHz 16Bit 16 2 3 4 5 6 7 8
aic7897 20 PCI/64 40MHz 16Bit 16 2 3 4 5 6 7 8
aic7899 20 PCI/64 80MHz 16Bit 16 2 3 4 5 6 7 8
1. Multiplexed Twin Channel Device - One controller servicing two
buses.
2. Multi-function Twin Channel Device - Two controllers on one chip.
3. Command Channel Secondary DMA Engine - Allows scatter gather list
and SCB prefetch.
4. 64 Byte SCB Support - SCSI CDB is embedded in the SCB to eliminate
an extra DMA.
5. Block Move Instruction Support - Doubles the speed of certain
sequencer operations.
6. ‘Bayonet’ style Scatter Gather Engine - Improves S/G prefetch per‐
formance.
7. Queuing Registers - Allows queuing of new transactions without paus‐
ing the sequencer.
8. Multiple Target IDs - Allows the controller to respond to selection
as a target on multiple SCSI IDs.
HARDWARE
Supported SCSI controllers include:
Adaptec AHA-2742W EISA Fast Wide SCSI adapter
Adaptec AHA-274xAT EISA dual channel Fast SCSI adapter
Adaptec AHA-284x VL Fast SCSI adapter
Adaptec AHA-2910 PCI Fast SCSI adapter (no SCSI BIOS)
Adaptec AHA-2915 PCI Fast SCSI adapter (no SCSI BIOS)
Adaptec AHA-2920C PCI Fast SCSI adapter
Note: Adaptec AHA-2920/A which use the Future Domain's chips
are not supported by this driver.
Adaptec AHA-2930C PCI Ultra SCSI adapter
Adaptec AHA-2930U2 PCI Ultra2 Wide LVD SCSI adapter
Adaptec AHA-2940 PCI Fast SCSI adapter
Adaptec AHA-2940U PCI Ultra SCSI adapter
Adaptec AHA-2940AU PCI Ultra SCSI adapter
Adaptec AHA-2940UW PCI Ultra Wide SCSI adapter
Adaptec AHA-2940UW Dual PCI dual channel Ultra Wide SCSI adapter
Adaptec AHA-2940UW Pro PCI Ultra Wide SCSI adapter
Adaptec AHA-2940U2W PCI Ultra2 Wide LVD SCSI adapter
Adaptec AHA-2940U2B PCI Ultra2 Wide LVD SCSI adapter
Adaptec AHA-2944W PCI Fast Wide Differential SCSI adapter
Adaptec AHA-2944UW PCI Ultra Wide Differential SCSI adapter
Adaptec AHA-2950U2W
Adaptec AHA-2950U2B 64bit PCI Ultra2 Wide LVD SCSI adapter
Adaptec AHA-19160B PCI Ultra160 Wide LVD SCSI adapter
Adaptec ASC-29160 PCI Ultra160 Wide LVD SCSI adapter
Adaptec AHA-29160N PCI Ultra160 Wide LVD SCSI adapter
Adaptec AHA-29160B 64bit PCI Ultra160 Wide LVD SCSI adapter
Adaptec AHA-3940 PCI dual channel Fast SCSI adapter
Adaptec AHA-3940U PCI dual channel Ultra SCSI adapter
Adaptec AHA-3940AU PCI dual channel Ultra SCSI adapter
Adaptec AHA-3940UW PCI dual channel Ultra Wide SCSI adapter
Adaptec AHA-3940AUW PCI dual channel Ultra Wide SCSI adapter
Adaptec AHA-3940U2W PCI dual channel Ultra2 Wide LVD SCSI adapter
Adaptec AHA-3950U2 64bit PCI dual channel Ultra2 Wide LVD SCSI
adapter
Adaptec AHA-3960 64bit PCI dual channel Ultra160 Wide LVD SCSI
adapter
Adaptec AHA-3985 PCI dual channel Fast SCSI RAID adapter
Adaptec AHA-39160 64bit PCI dual channel Ultra160 Wide LVD SCSI
adapter
Adaptec AHA-4944UW PCI quad channel PCI Ultra Wide Differential
SCSI adapter
Other SCSI controllers based on the Adaptec AIC7770, AIC7850,
AIC7860, AIC7870, AIC7880, AIC7890, AIC7891, AIC7892, AIC7895,
AIC7896, AIC7897 and AIC7899 SCSI host adapter chips.
SCSI CONTROL BLOCKS (SCBs)
Every transaction sent to a device on the SCSI bus is assigned a ‘SCSI
Control Block’ (SCB). The SCB contains all of the information required
by the controller to process a transaction. The chip feature table lists
the number of SCBs that can be stored in on-chip memory. All chips with
model numbers greater than or equal to 7870 allow for the on chip SCB
space to be augmented with external SRAM up to a maximum of 255 SCBs.
Very few Adaptec controller configurations have external SRAM.
If external SRAM is not available, SCBs are a limited resource. Using
the SCBs in a straight forward manner would only allow the driver to han‐
dle as many concurrent transactions as there are physical SCBs. To fully
use the SCSI bus and the devices on it, requires much more concurrency.
The solution to this problem is SCB Paging, a concept similar to memory
paging. SCB paging takes advantage of the fact that devices usually dis‐
connect from the SCSI bus for long periods of time without talking to the
controller. The SCBs for disconnected transactions are only of use to
the controller when the transfer is resumed. When the host queues
another transaction for the controller to execute, the controller
firmware will use a free SCB if one is available. Otherwise, the state
of the most recently disconnected (and therefor most likely to stay dis‐
connected) SCB is saved, via DMA, to host memory, and the local SCB
reused to start the new transaction. This allows the controller to queue
up to 255 transactions regardless of the amount of SCB space. Since the
local SCB space serves as a cache for disconnected transactions, the more
SCB space available, the less host bus traffic consumed saving and
restoring SCB data.
SEE ALSOaha(4), ahb(4), ahd(4), cd(4), ch(4), intro(4), scsi(4), sd(4), st(4)HISTORY
The ahc driver appeared in FreeBSD 2.0 and NetBSD 1.1.
AUTHORS
The ahc driver, the AIC7xxx sequencer-code assembler, and the firmware
running on the aic7xxx chips was written by Justin T. Gibbs. NetBSD
porting is done by Stefan Grefen, Charles M. Hannum, Michael Graff, Jason
R. Thorpe, Pete Bentley, Frank van der Linden and Noriyuki Soda.
BUGS
Some Quantum drives (at least the Empire 2100 and 1080s) will not run on
an AIC7870 Rev B in synchronous mode at 10MHz. Controllers with this
problem have a 42 MHz clock crystal on them and run slightly above 10MHz.
This confuses the drive and hangs the bus. Setting a maximum synchronous
negotiation rate of 8MHz in the SCSI-Select utility will allow normal
operation.
Target mode is not supported on NetBSD version of this driver.
BSD July 16, 2007 BSD
