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DIGI(4)			    BSD Programmer's Manual		       DIGI(4)

NAME
     digi - driver for Digi International serial host adapters

SYNOPSIS
     digi0 at isa? port 0x220 iomem 0xd0000 flags 0
     digi* at eisa?
     digi* at pci?

DESCRIPTION
     This driver supports most of Digi International's intelligent asyn-
     chronous serial host adapters. It does not support any "Concentrator"
     products.	The following products are supported by this driver:
     PC/Xi
     PC/Xm
     PC/Xe
     AccelePort Xe			 Use to be known as PC/Xe(8k)
     AccelePort Xr ISA, and PCI		 Use to be known as PC/Xr
     AccelePort Xem ISA, EISA, and PCI	 Use to be known as PC/Xem

CONFIGURATION
     For the PC/Xe, AccelePort Xe, and PC/Xi the I/O address, memory address
     and IRQ need to be set with the DIP switches on the board.	 The single
     I/O address can be one of 0x100, 0x110, 0x120, 0x200, 0x220, 0x300, or
     0x320.  The memory address is an 8 or 64 KB block of memory in the 640 KB
     to 1 MB range; this block must be aligned on a 64 KB boundary, but can be
     any block that is not in use by some other device or the system ROM.  The
     interrupt (IRQ) can be one of 3, 4, 5, 7, 10, 11, 12, or 15.  The values
     put in the config file must match what is put in the DIP switches.	 If
     there is one bank of 4 switches, the block is probably 8 KB; if there are
     two banks, one of 8 and one of 10, the block is probably 64 KB.  For
     these two boards the IRQ must be specified in the config file.

     For the ISA version of the AccelePort Xem only the I/O address is set
     with DIP switches. The IRQ is typically determined automatically at probe
     time, but may be specified in the kernel configuration file, or boot.de-
     fault.  The memory address must be specified in either the configuration
     file, or boot.default.  The single I/O address can be one of 0x104,
     0x114, 0x124, 0x204, 0x224, 0x304, or 0x324.  The interrupt (IRQ) can be
     one of 3, 5, 7, 10, 11, 12, or 15.	 For the PC/Xem the memory address is
     a 32 KB block of memory in the 640 KB to 1 MB range; this block must be
     aligned on a 32 KB boundary but can be any block that is not in use by
     some other device or the system ROM.

     The EISA version of the AccelePort Xem is similar to the ISA version.
     The major exception is that the I/O address is determined by the slot the
     board is plugged into rather than DIP switches.

     All configuration information for the PCI version of the AccelePort Xem
     is determined automatically by the system BIOS.

     Both the PCI and ISA versions AccelePort Xr is functionally similar to
     the to the corresponding version to the AccelePort Xem. The difference
     being the AccelePort Xr supports at most 8 ports.

     For the PC/Xi (8k), only the the I/O address is set with DIP switches.
     The memory address and IRQ are set from the values in the config file.
     The single I/O address can be one of 0x100, 0x110, 0x120, 0x200, 0x220,
     0x300, or 0x320.  The interrupt (IRQ) can be one of 3, 5, 7, 10, 11, 12,
     or 15.  If an IRQ is not specified in the config file, a free IRQ will be
     chosen.  For the PC/X (8k)i, the memory address is an 8 KB block of memo-
     ry in the 640 KB to 1 MB range; this block must be aligned on a 8 KB
     boundary but can be any block that is not in use by some other device or
     the system ROM.

OVERLAPPING MEMORY ADDRESSES
     The AccelePort Xe, AccelePort Xem, and AccelePort Xr support sharing mem-
     ory address space in the IO hole. This includes both multiple AccelePorts
     of the same type and multiple AccelePorts of different types. While shar-
     ing is permitted it is not required. Multiple boards can all have sepa-
     rate address spaces if desired. There are also no additional address
     alignment restrictions imposed when having overlapping address spaces.
     Neither the beginning or ending address for the various boards need
     align. Other Digi International products such as the PC/Xi may not be
     overlapped. The PCI version of the AccelePort Xr and AccelePort Xem do
     not use memory from the IO hole.

CONFIG
     The following are examples of common config lines:
     digi0 at isa? port 0x220 iomem 0xd0000 irq 15  PC/Xe, PC/Xi
     digi0 at eisa? iomem 0xd0000		    AccelePort Xem board
     digi0 at isa? port 0x224 iomem 0xd0000	    AccelePort Xem or Xr
     digi0 at pci?				    AccelePort Xem or Xr

DIGISETUP
     The firmware needed for this board to operate is downloaded using
     digisetup(8).  Digisetup(8) is also used to configure the altpin and the
     number of lines on a PC/Xem.

IOCTLS
     Unless specified otherwise, the argument to the DigiBoard specific
     ioctl(2) functions is a pointer to an int.	 When issuing an ioctl(2) that
     targets the controller rather than a specific line, any line may be
     opened for the file descriptor.  DigiBoard specific ioctl(2) functions
     that set values may only be called as root.

     DIOCNLINES	  Gets the number of lines on the controller.

     DIOCGALTPIN  Get state of DSR-DCD swapping; 0 indicates not swapped, 1
		  indicates swapped, and 2 indicates an unknown state.	Unlike
		  the flag in the config file that sets the state of all lines
		  on a board, this function sets a single line.

     DIOCSALTPIN  Set state of DSR-DCD swapping; 0 maps DSR to DSR and DCD to
		  DCD, 1 sets DSR to DCD and DCD to DSR.

FILES
     /dev/tty[A-D][0-4][0-f]	  device files through which board is accessed

     /usr/include/machine/digi.h  macros needed to access the DigiBoard spe-
				  cific ioctl(2) commands

SEE ALSO
     MAKEDEV(8),  digisetup(8),	 tty(4)

HISTORY
     This driver was originally written by Michael Galassi (nerd@per-
     cy.rain.com). It is now maintained by BSDI.

BUGS
     If the system were to crash while the memory on the DigiBoard is enabled,
     a hard reset may be needed to get things going again if the DigiBoard
     shares a 128k range with an 8 bit device such as a VGA or motherboard ROM
     BIOS.

4th Berkeley Distribution	 Jul 26, 1995				     2
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