struct_spi_master man page on Scientific

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STRUCT SPI_MASTER(9)	Serial Peripheral Interface (S	  STRUCT SPI_MASTER(9)

NAME
       struct_spi_master - interface to SPI master controller

SYNOPSIS
       struct spi_master {
	 struct device dev;
	 s16 bus_num;
	 u16 num_chipselect;
	 u16 dma_alignment;
	 u16 mode_bits;
	 u16 flags;
       #define SPI_MASTER_HALF_DUPLEX	  BIT(0)
       #define SPI_MASTER_NO_RX BIT(1)
       #define SPI_MASTER_NO_TX BIT(2)
	 int (* setup) (struct spi_device *spi);
	 int (* transfer) (struct spi_device *spi,struct spi_message *mesg);
	 void (* cleanup) (struct spi_device *spi);
       };

MEMBERS
       dev
	   device interface to this driver

       bus_num
	   board-specific (and often SOC-specific) identifier for a given SPI
	   controller.

       num_chipselect
	   chipselects are used to distinguish individual SPI slaves, and are
	   numbered from zero to num_chipselects. each slave has a chipselect
	   signal, but it´s common that not every chipselect is connected to a
	   slave.

       dma_alignment
	   SPI controller constraint on DMA buffers alignment.

       mode_bits
	   flags understood by this controller driver

       flags
	   other constraints relevant to this driver

       setup
	   updates the device mode and clocking records used by a device´s SPI
	   controller; protocol code may call this. This must fail if an
	   unrecognized or unsupported mode is requested. It´s always safe to
	   call this unless transfers are pending on the device whose settings
	   are being modified.

       transfer
	   adds a message to the controller´s transfer queue.

       cleanup
	   frees controller-specific state

DESCRIPTION
       Each SPI master controller can communicate with one or more spi_device
       children. These make a small bus, sharing MOSI, MISO and SCK signals
       but not chip select signals. Each device may be configured to use a
       different clock rate, since those shared signals are ignored unless the
       chip is selected.

       The driver for an SPI controller manages access to those devices
       through a queue of spi_message transactions, copying data between CPU
       memory and an SPI slave device. For each such message it queues, it
       calls the message´s completion function when the transaction completes.

COPYRIGHT
Kernel Hackers Manual 2.6.	 November 2013		  STRUCT SPI_MASTER(9)
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