VR(4) BSD Kernel Interfaces Manual VR(4)NAMEvr — VIA Technologies Rhine I/II/III Ethernet device driver
To compile this driver into the kernel, place the following lines in your
kernel configuration file:
Alternatively, to load the driver as a module at boot time, place the
following line in loader.conf(5):
The vr driver provides support for PCI Ethernet adapters and embedded
controllers based on the VIA Technologies VT3043 Rhine I, VT86C100A Rhine
II, and VT6105/VT6105M Rhine III Fast Ethernet controller chips.
The VIA Rhine chips use bus master DMA and have a descriptor layout
designed to resemble that of the DEC 21x4x “tulip” chips. The register
layout is different however and the receive filter in the Rhine chips is
much simpler and is programmed through registers rather than by download‐
ing a special setup frame through the transmit DMA engine. Transmit and
receive DMA buffers must be longword aligned. The Rhine chips are meant
to be interfaced with external physical layer devices via an MII bus.
They support both 10 and 100Mbps speeds in either full or half duplex.
The vr driver supports the following media types:
autoselect Enable autoselection of the media type and options.
The user can manually override the autoselected
mode by adding media options to the /etc/rc.conf
10baseT/UTP Set 10Mbps operation. The mediaopt option can also
be used to select either full-duplex or half-duplex
100baseTX Set 100Mbps (Fast Fthernet) operation. The
mediaopt option can also be used to select either
full-duplex or half-duplex modes.
The vr driver supports the following media options:
full-duplex Force full duplex operation
half-duplex Force half duplex operation.
Note that the 100baseTX media type is only available if supported by the
adapter. For more information on configuring this device, see
The vr driver supports VIA Technologies Rhine I, Rhine II, and Rhine III
based Fast Ethernet adapters including:
· AOpen/Acer ALN-320
· D-Link DFE520-TX
· D-Link DFE530-TX
· Hawking Technologies PN102TX
· Soekris Engineering net5501
The following variables are available as sysctl(8) variables:
Display lots of useful MAC counters maintained in the driver.
vr%d: couldn't map memory A fatal initialization error has occurred.
vr%d: couldn't map interrupt A fatal initialization error has occurred.
vr%d: watchdog timeout The device has stopped responding to the network,
or there is a problem with the network connection (cable).
vr%d: no memory for rx list The driver failed to allocate an mbuf for
the receiver ring.
vr%d: no memory for tx list The driver failed to allocate an mbuf for
the transmitter ring when allocating a pad buffer or collapsing an mbuf
chain into a cluster.
vr%d: chip is in D3 power state -- setting to D0 This message applies
only to adapters which support power management. Some operating systems
place the controller in low power mode when shutting down, and some PCI
BIOSes fail to bring the chip out of this state before configuring it.
The controller loses all of its PCI configuration in the D3 state, so if
the BIOS does not set it back to full power mode in time, it will not be
able to configure it correctly. The driver tries to detect this condi‐
tion and bring the adapter back to the D0 (full power) state, but this
may not be enough to return the driver to a fully operational condition.
If you see this message at boot time and the driver fails to attach the
device as a network interface, you will have to perform second warm boot
to have the device properly configured.
Note that this condition only occurs when warm booting from another oper‐
ating system. If you power down your system prior to booting FreeBSD,
the card should be configured correctly.
SEE ALSOaltq(4), arp(4), miibus(4), netintro(4), ng_ether(4), polling(4),
The VIA Technologies VT86C100A data sheet, http://www.via.com.tw.
The vr device driver first appeared in FreeBSD 3.0.
The vr driver was written by Bill Paul ⟨email@example.com⟩.
The vr driver always copies transmit mbuf chains into longword-aligned
buffers prior to transmission in order to pacify the Rhine chips. If
buffers are not aligned correctly, the chip will round the supplied buf‐
fer address and begin DMAing from the wrong location. This buffer copy‐
ing impairs transmit performance on slower systems but cannot be avoided.
On faster machines (e.g. a Pentium II), the performance impact is much
BSD February 7, 2010 BSD